View TLE6240GP_232879.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Data Sheet TLE 6240 GP
Smart 16-fold Low-Side Switch
Features Product Summary * Short Circuit Protection Supply voltage * Overtemperature Protection * Overvoltage Protection Drain source clamping voltage * 16 bit Serial Data Input and Diagnostic On resistance Output (2 bit/chan. acc. SPI Protocol) * Direct Parallel Control of Eight channels for PWM Applications * Parallel Inputs High or Low Active Pro- Output current (Channel 1-8) grammable (Channel 9-16) * General Fault Flag * Low Quiescent Current * Compatible with 3V Microcontrollers * Electostatic discharge (ESD) Protection Application * C Compatible Power Switch for 12 V and 24 V Applications * Switch for Automotive and Industrial System * Solenoids, Relays and Resistive Loads * Robotic Controls
VS VDS(AZ)max RON 1-8 RON 10,11,14,15 RON 9,12,13,16 ID(NOM) ID(NOM)
4.5 - 5.5V 60 V 1.0 0.35 0.3 0.5 A 1 A
P-DSO 36-12
Ordering Code:
Q67007-A9470
General description 16-fold Low-Side Switch (8 x 1.3 , 4 x 0.4 , 4 x 0.35 ) in Smart Power Technology (SPT) with a Serial Peripheral Interface (SPI) and 16 open drain DMOS output stages. The TLE 6240 GP is protected by embedded protection functions and designed for automotive and industrial applications. The output stages are controlled via SPI Interface. Additionally 8 channels can be controlled direct in parallel for PWM applications. Therefore the TLE 6240 GP is particularly suitable for engine management and powertrain systems, safety and body applications.
PRG
GND VS
RESET
VS
FAULT
IN1 IN2 IN3 IN4 IN9 IN10 IN11 IN12 SCLK SI CS SO GND
as Ch. 1 as Ch. 1 as Ch. 1 as Ch. 1 as Ch. 1 as Ch. 1 as Ch. 1
VBB
LOGIC
Protection Functions
Output Stage
16 16 1 8 16
OUT1
Serial Interface SPI
Output Control Buffer
OUT16
V3.1
Page
1
26.Aug 2002
Data Sheet TLE 6240 GP Detailed Block Diagram
All 16 channels can be controlled via the serial interface (SPI). In addition to the serial control it is possible to con-
VS
GND VS
PRG IN1
AND or OR programmable via SPI ctrl. word
Normal function
OUT1
1 &
SCB/Overload Open load Short to ground
OUT4
IN4
as channel 1
Output Stage
IN9
as channel 1
OUT9
OUT12 IN12
FAULT RESET
as channel 1
8 bit 16 bit DIAG
Normal function SCB/Overload Open load Short to ground
OUT5
OUT8
SO SI SCLK
CS
8 bit SPI Interface 16 bit
Output Stage
16 bit DIAG
OUT13
OUT16
GND
trol channel 1 to 4 and 9 to 12 direct in parallel with a separate input pin. The parallel input signal is either ORed or ANDed with the respective SPI data bit. This boolean operation can be programmed via SPI control byte (see chapter "Functional Description"). The SPI interface also performs a diagnostic information for each channel.
V3.1
Page
2
26.Aug 2002
Data Sheet TLE 6240 GP
Pin Description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Symbol GND OUT9 OUT10 OUT1 OUT2 IN1 IN2 VS
RESET CS
Pin Configuration (Top view) Function Ground Power Output Channel 9 Power Output Channel 10 Power Output Channel 1 Power Output Channel 2 Input Channel 1 Input Channel 2 Supply Voltage Reset Chip Select Program (inputs high or low-active) Input Channel 3 Input Channel 4 Power Output Channel 3 Power Output Channel 4 Power Output Channel 11 Power Output Channel 12 Ground Ground Power Output Channel 13 Power Output Channel 14 Power Output Channel 5 Power Output Channel 6 Input Channel 9 Input Channel 10 General Fault Flag Serial Data Output Serial Clock Serial Data Input Input Channel 11 Input Channel 12 Power Output Channel 7 Power Output Channel 8 Power Output Channel 15 Power Output Channel 16 Ground 1* 2 3 4 5 6 7 8 9 RESET 10 CS PRG 11 IN3 12 IN4 13 OUT3 14 OUT4 15 OUT11 16 OUT12 17 GND 18 Power SO 36 GND OUT9 OUT10 OUT1 OUT2 IN1 IN2 VS 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 GND OUT16 OUT15 OUT8 OUT7 IN12 IN11 SI SCLK SO
FAULT
PRG IN3 IN4 OUT3 OUT4 OUT11 OUT12 GND GND OUT13 OUT14 OUT5 OUT6 IN9 IN10
FAULT
IN10 IN9 OUT6 OUT5 OUT14 OUT13 GND
SO SCLK SI IN11 IN12 OUT7 OUT8 OUT15 OUT16 GND
Heat Slug internally connected to ground pins
V3.1
Page
3
26.Aug 2002
Data Sheet TLE 6240 GP Maximum Ratings for Tj = - 40C to 150C
Parameter Supply Voltage Continuous Drain Source Voltage (OUT1...OUT16) Input Voltage, All Inputs and Data Lines Load Dump Protection VLoad Dump = UP+US; UP=13.5 V RI1)=2 ; td=400ms; IN = low or high Channel 1-8 with Automotive Relay RL = 65 Channel 9-16 with Automotive Injector Valve RL = 14 RI=2 ; td=400ms; IN = low or high Channel 1-8 with Load RL = 24 Channel 9-16 with Load RL = 6.8 Output Current per Channel (see el. characteristics) Output Current per Channel @ TA = 25C (All 16 Channels ON; Mounted on PCB ) 3) Output Current (Max. total current of all channels on; Heat Sink required) Single Pulse Inductive Energy (internal clamping) TJ = 25C, ID1-8 = 0.5 A, ID9-16 = 1 A Power Dissipation (DC, mounted on PCB) @ TA = 25C Electrostatic Discharge Voltage (Human Body Model) according to MIL STD 883D, method 3015.7 and EOS/ESD assn. standard S5.1 - 1993 DIN Humidity Category, DIN 40 040 IEC Climatic Category, DIN IEC 68-1 Thermal Resistance junction - case (die soldered on heat slug) junction - ambient @ min. footprint junction - ambient @ 6 cm2 cooling area with heat pipes RthJC RthJA Symbol VS VDS VIN VLoad Dump
2)
Values -0.3 ... +7 45 - 0.3 ... + 7
Unit V V V V
90 65 65 50 ID(lim) ID1-8 ID9-16 IDmax EAS Ptot VESD ID(lim) min 0.3 0.5 14 50 3.3 2000 A A A mJ W V
E 40/150/56 1.5 K/W 50 38
Minimum footprint
PCB with heat pipes, 2 back side 6 cm cooling area
1) 2)
RI=internal resistance of the load dump test pulse generator LD200 VLoadDump is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839. 3) Output current rating so long as maximum junction temperature is not exceeded. At TA = 125 C the output current has to be calculated using RthJA according mounting conditions. V3.1 Page 4 26.Aug 2002
Data Sheet TLE 6240 GP
Electrical Characteristics
Parameter and Conditions VS = 4.5 to 5.5 V ; Tj = - 40 C to + 150 C; Reset = H (unless otherwise specified) 1. Power Supply, Reset Supply Voltage4 Supply Current Supply Current in Standby Mode (RESET = L) Minimum Reset Duration (After a reset all parallel inputs are ORed with the SPI data bits) 2. Power Outputs ON Resistance VS = 5 V Channel 1 ... 8 ON Resistance VS = 5 V Channel 10, 11, 14, 15 ON Resistance VS = 5 V Channel 9, 12, 13, 16 Output Clamping Voltage Output OFF Current Limit Output Leakage Current Turn-On Time Turn-Off Time 3. Digital Inputs Input Low Voltage Input High Voltage Input Voltage Hysteresis Input Pull Down/Up Current (IN1...4, IN9...12) PRG, Reset Pull Up Current Input Pull Down Current (SI, SCLK) Input Pull Up Current ( CS ) 4. Digital Outputs (SO, FAULT ) SO High State Output Voltage SO Low State Output Voltage Output Tri-state Leakage Current FAULT Output Low Voltage
4
Symbol
Values min
Unit typ max
VS IS IS(stdy) tReset,min
4.5 --10
-5 10 --
5.5 10 50 --
V mA A s
TJ = 25C TJ = 150C TJ = 25C TJ = 150C TJ = 25C TJ = 150C Channel 1-8 Channel 9-16 Channel 1...8 Channel 9...16 VReset = L ID = 0.5 A, resistive load ID = 0.5 A, resistive load
RDS(ON) RDS(ON) RDS(ON) VDS(AZ) ID(lim) ID(lkg) tON tOFF VINL VINH VINHys
------45 45 1 3 ----
1 1.7 0.35 0.60 0.30 0.50 50 52,5 1.5 4.5 -6 6
1.3 2.2 0.40 0.70 0.35 0.60 60 60 2 6 10 12 12
V A A s s
- 0.3 2.0 50 20 20 10 10
--100 50 50 20 20
1.0 -200 100 100 50 50
V V mV A A A A
VIN = 5 V
IIN(1..4,9...12) IIN(PRG,Res) IIN(SI,SCLK) IIN(CS)
ISOH = 2 mA ISOL = 2.5 mA
CS
VSOH VSOL ISOlkg VFAULTL
VS - 0.4 ---10 --0 --
-0.4 10 0.4
V V A V
= H, 0 VSO VS IFAULT = 1.6 mA
For VS < 4.5V the power stages are switched according the input signals and data bits or are definitely switched off. This undervoltage reset gets active at VS = 3V (typ. value) and is guaranteed by design. Page 5 26.Aug 2002
V3.1
Data Sheet TLE 6240 GP
Electrical Characteristics cont.
Parameter and Conditions VS = 4.5 to 5.5 V ; Tj = - 40 C to + 150 C ; Reset = H (unless otherwise specified) 5. Diagnostic Functions Open Load Detection Voltage Output Pull Down Current Fault Delay Time Short to Ground Detection Voltage Short to Ground Detection Current Overload Detection Threshold Overtemperature Shutdown Threshold5 Hysteresis5 6. SPI-Timing Serial Clock Frequency (depending on SO load) Serial Clock Period (1/fclk) Serial Clock High Time Serial Clock Low Time Enable Lead Time (falling edge of CS to rising edge of
CLK)
Symbol
Values min
Unit typ max
VDS(OL) VReset = H IPD(OL) td(fault) VDS(SHG) VReset = H ISHG ID(lim) 1...8 ID(lim) 9...16 Tth(sd) Thys
VS -2.5 VS -2 50 50 -50 1 3 170 -90 100 -100 1.3 4 -10
VS -1.3 150 200 -150 2 6 200 --
V A s V A A C K
VS -3.3 VS -2.9 VS -2.5
fSCK
DC 200 50 50 200 200 20 20 -200 ----
---------------
5 -------150 -100 120 150
MHz ns ns ns ns ns ns ns ns ns ns
tp(SCK) tSCKH tSCKL tlead
Enable Lag Time (falling edge of CLK to rising edge of CS ) tlag Data Setup Time (required time SI to falling of CLK) Data Hold Time (falling edge of CLK to SI) Disable Time @ CL = 50 pF
6 5
tSU tH tDIS tdt
Transfer Delay Time ( CS high time between two accesses) Data Valid Time CL = 50 pF5 5 CL = 100 pF 5 CL = 220 pF
tvalid
5 6
This parameter will not be tested but guaranteed by design This time is necessary between two write accesses to control e.g. channel 1 to 8 during the first access and channel 9 to 16 during the second access. To get the correct diagnostic information, the transfer delay time has to be extended to the maximum fault delay time td(fault)max = 200s. Page 6 26.Aug 2002
V3.1
Data Sheet TLE 6240 GP
Functional Description
The TLE 6240 GP is an 16-fold low-side power switch which provides a serial peripheral interface (SPI) to control the 16 power DMOS switches, and diagnostic feedback. The power transistors are protected against short to VBB, overload, overtemperature and against overvoltage by active zener clamp. The diagnostic logic recognizes a fault condition which can be read out via the serial diagnostic output (SO).
Circuit Description
Power Transistor Protection Functions7) Each of the 16 output stages has its own zener clamp, which causes a voltage limitation at the power transistor when solenoid loads are switched off. The outputs are provided with a current limitation set to a minimum of 1 A for channels 1 to 8 and 3 A for channels 9 to16. Each output is protected by embedded protection functions. In the event of an overload or short to supply, the current is internally limited and the corresponding bit combination is set (early warning). If this operation leads to an overtemperature condition, a second protection level (about 170 C) will change the output into a low duty cycle PWM (selective thermal shutdown with restart) to prevent critical chip temperatures.
SPI Signal Description
CS - Chip Select. The system microcontroller selects the TLE 6240 GP by means of the CS pin. Whenever the pin is in a logic low state, data can be transferred from the C and vice versa. CS High to Low transition: - Diagnostic status information is transferred from the power outputs into the shift register. - Serial input data can be clocked in from then on. - SO changes from high impedance state to logic high or low state corresponding to the SO bits. CS Low to High transition: - Transfer of SI bits from shift register into output buffers .
To avoid any false clocking the serial clock input pin SCLK should be logic low state during high to low transition of CS . When CS is in a logic high state, any signals at the SCLK and SI pins are ignored and SO is forced into a high impedance state. SCLK - Serial Clock. The system clock pin clocks the internal shift register of the TLE 6240 GP. The serial input (SI) accepts data into the input shift register on the falling edge of SCLK while the serial output (SO) shifts diagnostic information out of the shift register on the
7)
The integrated protection functions prevent an IC destruction under fault conditions and may not be used in normal operation or permanently
V3.1
Page
7
26.Aug 2002
Data Sheet TLE 6240 GP
rising edge of serial clock. It is essential that the SCLK pin is in a logic low state whenever chip select CS makes any transition. SI - Serial Input. Serial data bits are shifted in at this pin, the most significant bit first. SI information is read in on the falling edge of SCLK. Input data is latched in the shift register and then transferred to the control buffer of the output stages. The input data consist of 16 bit, made up of one control byte and one data byte. The control byte is used to program the device, to operate it in a certain mode as well as providing diagnostic information (see page 14). The eight data bits contain the input information for the eight channels, and are high active. SO - Serial Output. Diagnostic data bits are shifted out serially at this pin, the most significant bit first. SO is in a high impedance state until the CS pin goes to a logic low state. New diagnostic data will appear at the SO pin following the rising edge of SCLK.
RESET - Reset pin. If the reset pin is in a logic low state, it clears the SPI shift register and
switches all outputs OFF. An internal pull-up structure is provided on chip.
Output Stage Control
The 16 outputs of the TLE 6240 GP can be controlled via serial interface. Additionally eight of these 16 channels can alternatively be controlled in parallel (Channel 1to 4 and 9 to 12) for PWM applications. Parallel Control A Boolean operation (either AND or OR) is performed on each of the parallel inputs and respective SPI data bits, in order to determine the states of the respective outputs. The type of Boolean operation performed is programmed via the serial interface. The parallel inputs are high or low active depending on the PRG pin. If the parallel input pins are not connected (independent of high or low activity) it is guaranteed that the outputs 1 to 4 and 9 to 12 are switched off. The PRG pin itself is internally pulled up when it is not connected. PRG - Program pin. PRG = High (VS): Parallel inputs Channel 1to 4 and 9 to 12 are high active
PRG = Low (GND): Parallel inputs Channel 1 to 4 and 9 to 12 are low active.
V3.1
Page
8
26.Aug 2002
Data Sheet TLE 6240 GP
Serial Control of the Outputs: SPI protocol Each output is independently controlled by an output latch and a common reset line, which disables all outputs. The Serial Input (SI) is read on the falling edge of the serial clock. A logic high input 'data bit' turns the respective output channel ON, a logic low 'data bit' turns it OFF. CS must be low whilst shifting all the serial data into the device. A low-to-high transition of CS transfers the serial data input bits to the output control buffer. The 16 channels of the TLE 6240 GP are divided up into two parts for the control of the outputs (ON, OFF) and the diagnosis information. Channel 1 to 8: Serial Input (SI) information consists of 16 bit. 8 bit contain the input driver information for channel 1 to 8. The remaining 8 bits are used to program a certain operation mode. Control Byte1: Operation mode and diagnosis select for channels 1 to 8 Data Byte1: ON/OFF information for channel 1 to 8 Serial Output (SO) data consists of 16 bit containing the diagnosis information for channels 1 to 8 with two bits per channel. DIAG_1: Diagnosis data for channels 1 to 8. Channel 9 to 16: Control Byte2: Operation mode and diagnosis select for channels 9 to 16 Data Byte2: ON/OFF information for channel 9 to 16 DIAG_2: Diagnosis data for channels 9 to 16. To drive all 16 channels and to get the complete diagnosis data of the TLE 6240 GP a two step access has to be performed as follows: First access:
CS CS Control Byte1 Data Byte1 SI SO Control Byte1 Data Byte1
SI SO
16 bit Diagnosis
DIAG_1 (Ch. 1 to 8)
SI command: Control Byte 1 programs the operation mode of channels 1 to 8. Data Byte 1 gives the input information (on or off) for Channel 1 to 8. SO diagnosis: Diagnosis information of channel 1 to 8 or 9 to 16, depending on the SI control word before.
SI command: Control Byte 1 programs the operation mode of Channels 1 to 8. Data Byte 1 gives the input information (on or off) for Channel 1 to 8. SO diagnosis: 16 bit diagnosis information (two bit per channel) of channels 1 to 8
V3.1
Page
9
26.Aug 2002
Data Sheet TLE 6240 GP
Second access:
CS SI SO Control Byte2 Data Byte2 CS SI SO Control Byte2 Data Byte2
16 bit Diagnosis
DIAG_2 (Ch. 9 to 16)
SI command: Control Byte 2 programs the operation mode of channels 9 to 16. Data Byte 2 gives the input information (on or off) for Channel 9 to 16. SO diagnosis: Diagnosis information of channel 1 to 8 or 9 to 16, depending on the SI control word before.
SI command: Control Byte 2 programs the operation mode of Channels 9 to 16. Data Byte 2 gives the input information (on or off) for Channel 9 to 16. SO diagnosis: 16 bit diagnosis information (two bit per channel) of channels 9 to 16
Detailed Description As mentioned above, the serial input information consist of a control byte and a data byte. Via the control byte, the specific mode of the device is programmable.
MSB LSB
CCCCCCCC DDDDDDDD : 16 bit serial input information " "" " "" " ! " !
Control Byte Data Byte
Ten specific control words are recognised, having the following functions: No. SI Contol and Data Byte Function 1 LLLL LLLL XXXX XXXX 'Full Diagnosis' (two bits per channel) performed for channels 1 to 8. No change to output states. 2 HHLL LLLL XXXX XXXX State of the eight parallel inputs and '1-bit Diagnosis' for channel 1 to 8 is provided 3 HLHL LLLL XXXX XXXX Echo-function of SPI; SI direct connected to SO 4 LLHH LLLL DDDDDDDD IN1...4 and serial data bits 'OR'ed. 'Full Diagnosis' performed for channels 1 to 8. 5 HHHH LLLL DDDDDDDD IN1...4 and serial data bits 'AND'ed. 'Full Diagnosis' performed for channels 1 to 8. 6 LLLL HHHH XXXX XXXX 'Full Diagnosis' (two bits per channel) performed for channels 9 to 16. No change to output states. 7 HHLL HHHH XXXX XXXX State of the eight parallel inputs and '1-bit Diagnosis' for channel 9 to 16 is provided. 8 HLHL HHHH XXXX XXXX Echo-function of SPI; SI direct connected to SO 9 LLHH HHHH DDDDDDDD IN9...12 and serial data bits 'OR'ed. 'Full Diagnosis' performed for channels 9 to 16. 10 HHHH HHHH DDDDDDDD IN9...12 and serial data bits 'AND'ed. 'Full Diagnosis' performed for channels 9 to 16. Note: Control Byte: Channel Selection via Bit 0 to 3 Bits 0 to 3 = L Channels 1 to 8 selected Bits 0 to 3 = H Channels 9 to 16 selected Data byte: 'X' means 'don't care', because this data bits will be ignored 'D' represents the data bits, either being H (= ON) or L (= OFF)
V3.1
Page
10
26.Aug 2002
Data Sheet TLE 6240 GP
In the following section the different control bytes will be descriped. X used within the control byte means: X = L: Command is valid for channels 1 to 8 X = H: Command is valid for channels 9 to 16 1/6. LLLL XXXX - Diagnosis only By clocking in this control byte, it is possible to get pure diagnostic information (two bits per channel) in accordance with Figure 1 (page 14). The data bits are ignored, so that the state of the outputs are not influenced. This command is only active once unless the next control command is again "Diagnosis only". Diagnostic information can be read out at any time with no change of the switching conditions. Example for two consecutive chip select cycles:
CS SI SO LLLL HHHH LLLL HHHH XXXX HHHH XXXX HHHH
SI command: Diagnosis only for channels 1 to 8. No change of the output states SO diagnosis: No fault, normal function of channels 1 to 8 or 9 to 16 depending on previous SI command
CS SI SO LLLL HHHH XXXX XXXX
DIAG_1
SI command: Diagnosis only for channels 9 to 16. No change of the output states DIAG_2 provided during next chip select cycle SO diagnosis: 2 bit diagnosis performed for channels 1 to 8
2/7. HHLL XXXX - Reading back of the eight inputs and `1-bit Diagnosis' provided If the TLE 6240 GP is used as bare die in a hybrid application, it is necessary to know if proper connections exist between the C-port and parallel inputs. By entering `HHLL' as the control word, the first eight bits of the SO give the state of the parallel inputs, depending on the C signals. By comparing the IN-bits with the corresponding C-port signal, the necessary connection between the C and the TLE 6240 GP can be verified - i.e. `read back of the inputs'. The second 8-bits fed out at the serial output contains `1-bit' fault information of the outputs (H = no fault, L = fault ). In the expression given below for the output byte, `FX' is the fault bit for channel X.
MSB
Parallel Input Signals
LSB
Fault Bits Channels 1 to 8 or 9 to 16
IN12 IN11 IN10 IN9 """"""""! FX FX FX FX FX FX FX FX ! : Serial Output byte """""""" IN4 IN3 IN2 IN1 """""" """"""" " " "
V3.1
Page
11
26.Aug 2002
Data Sheet TLE 6240 GP
Example for two consecutive chip select cycles:
CS SI SO HHLL HHHH LLLL HHHH XXXX HHHH XXXX HHHH
SI command: No change of the output states; reading back of the 8 inputs and 1bit diagnosis for channels 1 to 8 SO diagnosis: No fault, normal function of channels 1 to 8 or 9 to 16 depending on previous SI command
CS SI SO HHLL HHHH XXXX XXXX
State of 8 par. inputs 1bit diagnosis Ch.1..8
SI command: No change of the output states; reading back of the 8 inputs and 1bit diagnosis for channels 9 to 16 provided during next chip select cycle SO diagnosis: State of eight parallel inputs and 1 bit diagnosis performed for channels 1 to 8
3/8. HLHL XXXX - Echo-function of SPI To check the proper function of the serial interface the TLE 6240 GP provides a "SPI Echo Function". By entering HLHL as control word, SI and SO are connected during the next CS period. By comparing the bits clocked in with the serial output bits, the proper function of the SPI interface can be verified. This internal loop is only closed once (for one CS period). The "Echo Function" does not cause any internal processing of data and after the next CS signal the SO data is "0" (all registers reset).
CS SI SO HLHL HHHH LLLL HHHH XXXX HHHH XXXX HHHH CS SI
SI and SO int. connected
Echo-function of SPI, i.e. SI directly connected to SO. SI information will not be accepted during this cycle.
SO
SI command: No change of the output states; Echo function of SPI SO diagnosis: No fault, normal function of channels 1 to 8 or 9 to 16 depending on previous SI command
4/9. LLHH XXXX DDDDDDDD - OR operation, and `full diagnosis' With LLHH LLLL as the control word, each of the input signals IN1...IN4 are 'OR'ed with the corresponding SI data bits. With LLHH HHHH as the control word, each of the input signals IN9...IN12 are 'OR'ed with the corresponding SI data bits.
V3.1
Page
12
26.Aug 2002
Data Sheet TLE 6240 GP
IN 1...4/9...12
1
Serial Input, data bits 0...3
Output Driver
This OR operation enables the serial interface to switch the channel ON, even though the corresponding parallel input might be in the off state. SPI Priority for ON-State Also parallel control of the outputs is possible without an SPI input. The OR-function is the default Boolean operation if the device restarts after a Reset, or when the supply voltage is switched on for the first time. If the OR operation is programmed it is latched until it is overwritten by the AND operation. 5/10. HHHH XXXX DDDDDDDD - AND operation, and `full diagnosis' With HHHH LLLL as the control word, each of the input signals IN1...IN4 are 'AND'ed with the corresponding SI data bits. With HHHH HHHH as the control word, each of the input signals IN9...IN12 are 'AND'ed with the corresponding SI data bits.
IN 1...4/9...12
&
Serial Input, data bits 0...3
Output Driver
The AND operation implies that the output can be switched off by the SPI data bit input, even if the corresponding parallel input is in the ON state. SPI Priority for OFF-state This also implies that the serial input data bit can only switch the output channel ON if the corresponding parallel input is in the ON state. If the AND operation is programmed it is latched until it is overwritten by the OR operation.
V3.1
Page
13
26.Aug 2002
Data Sheet TLE 6240 GP
Control words beside No. 1- 10 Not specified Control words are not executed (cause no function) and the shift register (SO Data) is reset after the CS signal (all "0"). Example for an access to channel 1 to 8: LLHH LLLL HLLH LLLH: OR operation between parallel inputs and data bits, i.e channel 1, 5 and 8 will be switched on. The next command is now: LHHH LLLL HHHH LLLL LHHH LLLL as command word has no special meaning and will not be accepted. The output states will not be changed and the shift register will be reset (at the next CS SO Data all "0").
Diagnostics
FAULT - Fault pin. There is a general fault pin (open drain) which shows a high to low transition as soon as an error occurs for any one of the sixteen channels. This fault indication can be used to generate a C interrupt. Therefore a `diagnosis' interrupt routine need only be called after this fault indication. This saves processor time compared to a cyclic reading of the SO information. As soon as a fault occurs, the fault information is latched into the diagnosis register. A new error will over-write the old error report. Serial data out pin (SO) is in a high impedance state when CS is high. If CS receives a LOW signal, all diagnosis bits can be shifted out serially.
For full diagnosis there are two diagnostic bits per channel configured as shown in Figure 1. Normal function: The bit combination HH indicates that there is no fault condition, i.e. normal
Diagnostic Serial Data OUT SO
15 14 13 12 11 10 9 8 7 6- - - - -
Ch.8 Ch.7 Ch.16 Ch.15
Ch.6 Ch.14
Ch.5 Ch.13
HH HL LH LL
Normal function Overload, Shorted Load or Overtemperature Open Load Shorted to Ground
Figure 1: Two bits per channel diagnostic feedback function. Overload, Short Circuit to Battery (SCB) or Overtemperature: HL is set when the current limitation gets active, i.e. there is a overload, short to supply or overtemperature condition. Open load: An open load condition is detected when the drain voltage decreases below 3 V (typ.). LH bit combination is set.
V3.1 Page 14 26.Aug 2002
Data Sheet TLE 6240 GP
Short Circuit to GND: If a drain to ground short circuit exists and the drain to ground current exceeds 100 A, short to ground is detected and the LL bit combination is set. A definite distinction between open load and short to ground is guaranteed by design. The standard way of obtaining diagnostic information is as follows: Clock in serial information into SI pin and wait approximately 150 s to allow the outputs to settle. Clock in the identical serial information once again - during this process the data coming out at SO contains the bit combinations representing the diagnosis conditions as described in figure 1. Reset of the Diagnosis Register The diagnosis register is reset after reading the diagnosis data (after the falling CS edge). This is done for channels 1-8 and channels 9-16 separately depending on the previous command. By means of the control byte it is possible either to: a) control the outputs according to the data byte, as well as being able to read the diagnostic information (two bits per channel) or b) purely get diagnostic information without changing the state of the outputs or c) read back the parallel inputs plus a simple diagnosis (one bit per channel) or d) SPI "Echo Function" as a diagnosis of proper SPI function a) Serial Control of Outputs * LLHHLLLL LHLHHLLL " "" " "" " ! " !
Control Byte Data Byte
SI information: OR-operation valid for channels 1 to 8. SO: 16 bit diagnosis for channels 1 to 8 performed during next chip select cycle. * LLHHHHHH LHLHHLLL " "" " "" " ! " !
Control Byte Data Byte
SI information: OR-operation valid for channels 9 to 16 SO: 16 bit diagnosis for channels 9 to 16 performed during next chip select cycle. * HHHHLLLL LHLHHLLL " "" " "" " ! " !
Control Byte Data Byte
SI information: AND-operation valid for channels 1 to 8 SO: 16 bit diagnosis for channels 1 to 8 performed during next chip select cycle. * HHHHHHHH LHLHHLLL " "" " "" " ! " !
Control Byte Data Byte
SI information: AND-operation valid for channels 9 to 16 SO: 16 bit diagnosis for channels 9 to 16 performed during next chip select cycle. b) Diagnosis Only
V3.1
Page
15
26.Aug 2002
Data Sheet TLE 6240 GP
* LLLLLLLL XXXXXXXX " " ! " "" " " " !
Control Byte Data Byte
SI information: Full diagnosis for channels 1 to 8. No change of output states. SO: 16 bit diagnosis for channels 1 to 8 performed during next chip select cycle. * LLLLHHHH XXXXXXXX " "" " "" " ! " !
Control Byte Data Byte
SI information: Full diagnosis for channels 9 to 16. No change of output states. SO: 16 bit diagnosis for channels 9 to 16 performed during next chip select cycle. c) Read back of parallel inputs plus simple diagnosis * HHLLLLLL XXXXXXXX : " "" " "" " ! " !
Control Byte Data Byte
SI information: No change of the output states. Read back of parallel inputs and 1 bit diag nosis for channels 1 to 8. SO:State of eight inputs plus 1 bit diagnosis for channel 1 to 8 during next chip select cycle. * HHLLHHHH XXXXXXXX " "" " "" " ! " !
Control Byte Data Byte
SI information: No change of the output states. Read back of parallel inputs and 1 bit diagnosis for channels 9 to 16. SO: State of eight inputs plus 1 bit diagnosis for channel 9 to 16 during next chip select cycle. d) SPI Echo function * HLHLLLLL XXXXXXXX : " "" " "" " ! " !
Control Byte Data Byte
SI information: Echo function of SPI interface. No change of the output states. SO: During next chip select cycle the SI bits clocked in appear directly at SO because of an internal connection for this cycle * HLHLHHHH XXXXXXXX " "" " "" " ! " !
Control Byte Data Byte
SI information: Echo function of SPI interface. No change of the output states. SO: During next chip select cycle the SI bits clocked in appear directly at SO because of an internal connection for this cycle
V3.1
Page
16
26.Aug 2002
Data Sheet TLE 6240 GP Timing Diagrams
Serial Interface
CS SCLK SI SO
C O 14 N 13 T 12 R 11 O 10 L 9 Byte 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 0 0
MSB
15
LSB
Input Timing Diagram
CS
0.7VS
0.2 VS tSCKH tlag
0.7VS 0.2VS
tdt
SCLK
tlead tSCKL tH
0.7VS 0.2VS
tSU
SI
SO Valid Time Waveforms
0.7 VS
Enable and Disable Time Waveforms
CS
SCLK tvalid
0.2 VS
tDis SO SO
0.7 VS 0.2 VS 0.7 VS 0.2 VS
SO
V3.1
Page
17
26.Aug 2002
Data Sheet TLE 6240 GP
Power Outputs
V IN
t
V DS 80% 20%
tON
tOFF
t
Application Circuit
V BB
V S = 5V
10k
PRG
VS OUT1
FAULT
RESET
OUT2
C e.g. C167
MTSR MRST CLK P xy
IN1 IN2 IN3 IN4 IN9 IN10 IN11 IN12
SI SO CLK CS
TLE 6240 GP
OUT16
GND
V3.1
Page
18
26.Aug 2002
Data Sheet TLE 6240 GP Typical electrical Characteristics
Drain-Source on-resistance
RDS(ON) = f (Tj) ; Vs = 5V
Typical Drain-Source ON- Rresistance
1,8 1,7 1,6 1,5 1,4 1,3 1,2 1,1 1 0,9 0,8 0,7 0,6 -50 -25 0 25 50 Tj [C] 75 100 125 150 175
Channel 1 - 8
Figure 2 : Typical ON Resistance versus Junction-Temperature Channel 1-8
R D S (O N ) [O hm ]
Typical Drain-Source ON- Rresistance
0,65 0,6 0,55 R D S (ON ) [O hm ] 0,5 0,45 0,4 0,35 0,3 0,25 0,2 -50 -25 0 25 50 Tj [C] 75 100
Channel 10, 11, 14, 15
Figure 3 : Typical ON Resistance versus Junction-Temperature Channel 10, 11, 14, 15
125
150
175
Typical Drain-Source ON- Rresistance
0,55 0,5 R D S (O N ) [O hm ] 0,45 0,4 0,35 0,3 0,25 0,2 0,15 -50 -25 0 25 50 Tj [C] 75 100
Channel 9, 12, 13, 16
Figure 4 : Typical ON Resistance versus Junction-Temperature Channel 9, 12, 13, 16
125
150
175
V3.1
Page
19
26.Aug 2002
Data Sheet TLE 6240 GP
Output Clamping Voltage
VDS(AZ) = f (Tj) ; Vs = 5V
Typical Clamping Voltage
54 53 52 V D S (A Z ) [V ] 51 50 49 48 47 46 -50 -25 0 25 50 Tj [C] 75 100 125
Channel 1-8
150
175
Figure 5 :
Typical Clamping Voltage versus Junction-Temperature Channel 1-8
Typical Clamping Voltage
56 55 54 V D S (A Z ) [V ] 53 52 51 50 49 48 -50 -25 0 25 50 Tj [C] 75 100 125
Channel 9-16
150
175
Figure 6 :
Typical Clamping Voltage versus Junction-Temperature Channel 9-16
V3.1
Page
20
26.Aug 2002
Data Sheet TLE 6240 GP Parallel SPI Configuration
Engine Management Application
TLE 6240 GP in combination with TLE 6230 GP (octal switch) for relays and general purpose loads and TLE 6220 GP to drive the injector valves. This arrangement covers the numerous loads to be driven in a modern Engine Management/Powertrain system. From 28 channels in sum 16 can be controlled direct in parallel for PWM applications.
P x.1-4
4
Injector 1
4 PWM Channels
SI SO CLK CS
Injector 2 Injector 3 Injector 4
MTSR MRST CLK P x.y 4 P x.1-4
CS
TLE 6220 GP Quad
4 PWM Channels
SI SO CLK
C
C167
P x.y 8 P x.1-8
CS
TLE 6230 GP Octal
8 PWM Channels
SI SO CLK
P x.y
CS
TLE 6240 GP 16-fold
Daisy Chain Application TLE 6240 GP
Px.1 Px.2 C MTSR SI
CS
CLK
CS
SI
CLK
CS
SI
CLK
TLE SO 6240 GP 16-fold
TLE SO 6240 GP 16-fold
TLE SO 6240 GP 16-fold
MRST
V3.1
Page
21
26.Aug 2002
Data Sheet TLE 6240 GP
Package and Ordering Code
(all dimensions in mm)
P-DSO 36-12
TLE 6240 GP
Ordering Code Q67007-A9470
V3.1
Page
22
26.Aug 2002
Data Sheet TLE 6240 GP
Published by Infineon Technologies AG, Bereichs Kommunikation St.-Martin-Strasse 76, D-81541 Munchen (c) Infineon Technologies AG 1999 All Rights Reserved.
Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
V3.1
Page
23
26.Aug 2002

▲Up To Search▲

Price & Availability of TLE6240GP

	To Download TLE6240GP Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .